FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge.
Wenjun TangMingyen LeeJuejian WuYixin XuYao YuYongpan LiuKai NiYu WangHuazhong YangVijaykrishnan NarayananXueqing LiPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2023)