PARC: a new pyramidal FPGA architecture based on a RISC processor.
C. E. RabelMohamad SawanPublished in: ISCAS (1) (1999)
Keyphrases
- instruction set
- hardware architecture
- xilinx virtex
- parallel architecture
- dedicated hardware
- hardware implementation
- systolic array
- high speed
- fpga device
- processing elements
- hardware architectures
- computation intensive
- application specific
- floating point
- level parallelism
- single chip
- parallel processing
- general purpose processors
- hardware design
- computer architecture
- management system
- software implementation
- real time
- fpga implementation
- digital signal
- gate array
- low power consumption
- industry standard
- field programmable gate array
- low cost
- associative memory
- multiresolution
- real time image processing
- memory access
- processing units
- message passing
- signal processing
- fpga technology
- pipelined architecture