Mapping Interleaving Laws to Parallel Turbo and LDPC Decoder Architectures.
Alberto TarableSergio BenedettoGuido MontorsiPublished in: IEEE Trans. Inf. Theory (2004)
Keyphrases
- turbo codes
- error correction
- channel coding
- low density parity check
- distributed video coding
- ldpc codes
- low complexity
- distributed source coding
- multi core processors
- decoding algorithm
- wireless channels
- parallel implementation
- error resilience
- parallel architectures
- packet loss
- forward error correction
- rate allocation
- compressed images
- parallel processing
- parallel programming
- shared memory
- image compression
- channel capacity
- decoding process
- video transmission
- image transmission
- source coding
- parallel computers