A High-speed 32-bit Signed/Unsigned Pipelined Multiplier.
Qingzheng LiGuixuan LiangAmine BermakPublished in: DELTA (2010)
Keyphrases
- high speed
- shift register
- low power
- floating point
- real time
- data flow
- frame rate
- hardware implementation
- machine learning
- instruction set architecture
- bit vector
- high speed networks
- type ii
- logical operations
- linear array
- interior point methods
- magnetic tape
- efficient implementation
- bit parallel
- artificial intelligence