Login / Signup
VLSI Implementation of a Digitally Tunable Gm-C Filter with Double CMOS Pair.
S. Ramasamy
B. Venkataramani
K. Anbugeetha
Published in:
VLSI Design (2008)
Keyphrases
</>
vlsi implementation
fir filters
vlsi architecture
filter bank
high speed
low power
low cost
power consumption
impulse response
nonlinear filters
filter design
noise reduction
transfer function
lifting scheme
linear algebra
neural network
singular value decomposition
image processing