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A Cost-efficient Hardware Accelerator Design for 2D Sliding Discrete Fourier Transform.

Wen-Ho JuangMeng-Chang WuYung-Hoh SheuJen-Yu ShiehTung-Hsien Hsieh
Published in: ICCE-Taiwan (2023)
Keyphrases
  • cost efficient
  • discrete fourier transform
  • embedded systems
  • building blocks
  • neural network
  • feature selection
  • image processing
  • co occurrence
  • low cost