FPGA Implementation of Cycle-Reduced Diagonal Data Flow Systolic Array for Edge Device AI.
Gyubin SeongJong Kang ParkJong Tae KimPublished in: ISOCC (2023)
Keyphrases
- systolic array
- data flow
- fpga implementation
- reconfigurable architecture
- hardware implementation
- database machine
- control flow
- artificial intelligence
- object oriented software
- machine learning
- data transfer
- object oriented
- digital signal processing
- parallel architecture
- computer vision
- transfer function
- image processing algorithms
- relational databases
- image segmentation