RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking.
Vida VakilotojarPeter A. BeerelPublished in: ASP-DAC (1997)
Keyphrases
- symbolic model checking
- heterogeneous systems
- model checking
- formal verification
- model checker
- temporal logic
- distributed architecture
- computing systems
- web services
- petri net
- application developers
- formal specification
- formal methods
- partial observability
- parallel architectures
- legacy systems
- binary decision diagrams
- grid environment
- learning algorithm
- processing units
- data mining
- reinforcement learning
- parallel computing
- symbolic representation
- database
- message passing
- database management systems
- web applications
- state space
- databases