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An Efficient Timing and Clock Tree Aware Placement Flow with Multibit Flip-Flops for Power Reduction.
Jasmine Kaur Gulati
Bhanu Prakash
Sumit Jagdish Darak
Published in:
VDAT (2017)
Keyphrases
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power consumption
power reduction
power dissipation
low power
flip flops
power saving
high speed
multiple input
energy efficiency
cmos technology
memory efficient