An efficient racetrack memory for L2 cache in GPGPUs.

Ehsan Atoofian Ahsan Saghir

Published in: Comput. Syst. Sci. Eng. (2017)

Keyphrases

main memory
cache conscious
memory hierarchy
memory access
cache misses
garbage collection
data access
memory management
memory subsystem
memory size
hit rate
database systems
limited memory
multithreading
binary trees