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Accelerating More Secure RC4 : Implementation of Seven FPGA Designs in Stages upto 8 byte per clock.
Rourab Paul
Hemanta Dey
Amlan Chakrabarti
Ranjan Ghosh
Published in:
CoRR (2016)
Keyphrases
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hardware implementation
fpga device
high speed
real time
hardware architecture
signal processing
fpga technology
information systems
software implementation
dedicated hardware
multistage
design space
error correcting codes
real time image processing