Implementation of Systolic RLS Adaptive Array Using FPGA and Its Performance Evaluation.
Yoshiaki YokoyamaMinseok KimHiroyuki AraiPublished in: VTC Fall (2006)
Keyphrases
- systolic array
- hardware implementation
- low cost
- parallel architecture
- high speed
- hardware architecture
- hardware architectures
- real time
- dedicated hardware
- data flow
- adaptive filtering
- software implementation
- efficient implementation
- hybrid learning
- fpga implementation
- programmable logic
- reconfigurable hardware
- face recognition