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Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm.

Hakan CetinkayaAlper GirginTufan Coskun Karalar
Published in: Microelectron. J. (2023)
Keyphrases
  • domain knowledge
  • fully integrated
  • power consumption
  • workflow management
  • mixed signal
  • high speed
  • case study
  • thin film
  • databases
  • knowledge base
  • management system