Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of the HPCChallenge Benchmark Suite.
Marius MeyerTobias KenterChristian PlesslPublished in: CoRR (2020)
Keyphrases
- benchmark suite
- field programmable gate array
- hardware implementation
- parallel computing
- fpga implementation
- embedded systems
- hardware design
- low cost
- high speed
- computing systems
- image processing algorithms
- fpga technology
- parallel programming
- parallel implementation
- software implementation
- real time
- transactional memory
- hardware software
- efficient implementation
- real time image processing
- case based planning
- low power consumption
- parallel algorithm
- programming language