A Novel Design of CAVLC Decoder With Low Power and High Throughput Considerations.
Tsung-Han TsaiTe-Lung FangYu-Nan PanPublished in: IEEE Trans. Circuits Syst. Video Technol. (2011)
Keyphrases
- high throughput
- low power
- single chip
- low cost
- low power consumption
- power consumption
- high speed
- vlsi architecture
- genome wide
- biological data
- logic circuits
- microarray
- cmos technology
- systems biology
- ultra low power
- gate array
- low complexity
- design process
- digital signal processing
- image sensor
- data acquisition
- power dissipation
- power reduction
- mass spectrometry data
- genomic data
- data analysis