Exploring the use of shift register lookup tables for Keccak implementations on Xilinx FPGAs.
Jori WinderickxJoan DaemenNele MentensPublished in: FPL (2016)
Keyphrases
- hardware implementation
- shift register
- lookup tables
- field programmable gate array
- efficient implementation
- high speed
- fpga implementation
- basis functions
- state space
- lookup table
- hardware architecture
- signal processing
- image processing algorithms
- training samples
- random number generator
- parallel computing
- machine learning
- image processing