Bypass aware instruction scheduling for register file power reduction.
Sanghyun ParkAviral ShrivastavaNikil D. DuttAlexandru NicolauYunheung PaekEugene EarliePublished in: LCTES (2006)
Keyphrases
- power reduction
- multithreading
- instruction scheduling
- power consumption
- low power
- power saving
- highly efficient
- parallel computing
- multi threaded
- computational power
- file system
- coarse grained
- distributed memory
- energy efficiency
- fine grained
- shared memory
- real time
- data partitioning
- power dissipation
- multi core processors
- constraint programming