A Novel Approximate Adder Design Methodology with Single LUT Delay for Fault-tolerant FPGA-based Systems.
Tuaha NomaniMujahid MohsinPublished in: INTELLECT (2019)
Keyphrases
- fault tolerant
- design methodology
- distributed systems
- fault tolerance
- safety critical
- design criteria
- load balancing
- design methodologies
- fuzzy neural network
- artificial intelligence
- building blocks
- object oriented
- message passing
- embedded systems
- expert systems
- physical design
- regression model
- social networks
- databases