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High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs.
Dionysios Diamantopoulos
Sotirios Xydis
Kostas Siozios
Dimitrios Soudris
Published in:
FPL (2015)
Keyphrases
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single chip
high level synthesis
low power
low cost
image sensor
parallel architecture
high speed
cmos image sensor
embedded systems
embedded processors
real time
power consumption
image segmentation