Power Dissipation Reductions with Genetic Algorithms.

Eiichi Takahashi Masahiro Murakawa Yuji Kasai Tetsuya Higuchi

Published in: Evolvable Hardware (2003)

Keyphrases

power dissipation
genetic algorithm
power consumption
low power
power reduction
digital signal processing
logic circuits
cmos technology
evolutionary algorithm
artificial neural networks
neural network
fuzzy logic
chip design
flip flops
nm technology
finite state machines
short circuit
wireless sensor networks