A Low-Power 512-Bit EEPROM Design for UHF RFID Tag Chips.
Jae-Hyung LeeGyu-Ho LimJi-Hong KimMu-Hun ParkKyo-Hong JinJeong-Won ChaPan-Bong HaYung-Jin GangYoung-Hee KimPublished in: International Conference on Computational Science (4) (2007)
Keyphrases
- low power
- low power consumption
- rfid tags
- low cost
- power consumption
- high speed
- single chip
- vlsi architecture
- mixed signal
- logic circuits
- digital signal processing
- power dissipation
- cmos technology
- gate array
- real time
- radio frequency identification
- authentication protocol
- power reduction
- rfid reader
- vlsi circuits
- resource constrained
- design methodology
- cost effective
- design process
- nm technology