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Compact implementation of linear weighted CMOS transconductance adder based on the flipped voltage follower.
Ivan Padilla
Jaime Ramírez-Angulo
Ramón González Carvajal
Antonio J. López-Martín
Alfonso Carlosena
Published in:
ISCAS (2006)
Keyphrases
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cmos technology
low voltage
circuit design
power supply
power dissipation
efficient implementation
high speed
data sets
low cost
low power
design considerations
analog vlsi
real time
order statistics
weighted sum
parallel processing
closed form
power system