Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing.
Nainesh AgarwalNikitas J. DimopoulosPublished in: SAMOS (2009)
Keyphrases
- low power
- simulated annealing
- power consumption
- low cost
- high speed
- single chip
- high power
- logic circuits
- genetic algorithm
- vlsi circuits
- vlsi architecture
- digital signal processing
- wireless transmission
- low power consumption
- cmos technology
- gate array
- image sensor
- power reduction
- mixed signal
- power dissipation
- delay insensitive
- hardware and software
- wireless networks
- signal processor
- real time