An FPGA-based In-Line Accelerator for Memcached.

Maysam Lavasani Hari Angepat Derek Chiou

Published in: IEEE Comput. Archit. Lett. (2014)

Keyphrases

field programmable gate array
application specific
line segments
data sets
embedded systems
parallel implementation
hardware design
databases
e learning
bayesian networks
mobile robot
low cost
line drawings
hardware implementation
video processing