The Butterfly PUF: Protecting IP on every FPGA.
Sandeep S. KumarJorge GuajardoRoel MaesGeert Jan SchrijenPim TuylsPublished in: HOST (2008)
Keyphrases
- electronic devices
- field programmable gate array
- high speed
- hardware implementation
- real time image processing
- real time
- hardware architecture
- verilog hdl
- fpga implementation
- ip address
- hardware design
- ip networks
- linear algebra
- dedicated hardware
- systolic array
- single chip
- access control
- internet protocol
- signal processing
- fpga device
- application layer
- parallel computers
- switched networks
- digital signal
- hardware architectures
- image processing