Logic Partitioning for Minimizing Gate Arrays.

Chet A. Palesko Lex A. Akers

Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1983)

Keyphrases

classical logic
automated reasoning
logic programming
multi valued
arbitrary size
modal logic
partitioning algorithm
proof theory
sound and complete axiomatization
real time
data sets
neural network
expressive power
predicate logic
deontic logic
asynchronous circuits