From GPU to FPGA: A Pipelined Hierarchical Approach to Fast and Memory-Efficient NDN Name Lookup.
Yanbiao LiDafang ZhangXian YuJing LongWei LiangPublished in: FCCM (2014)
Keyphrases
- memory efficient
- real time
- parallel architecture
- external memory
- iterative deepening
- high speed
- multithreading
- hardware implementation
- parallel implementation
- multiple sequence alignment
- parallel hardware
- hardware design
- graphics hardware
- data flow
- signal processing
- gpu accelerated
- hierarchical structure
- real time image processing
- gpu implementation
- verilog hdl
- graphics processors
- integral image
- parallel computation
- low cost
- xml documents