An Adaptive Hardware Machine Architecture and Compiler for Dynamic Processor Reconfiguration.
Peter M. AthanasHarvey F. SilvermanPublished in: ICCD (1991)
Keyphrases
- industry standard
- central processing unit
- instruction set
- parallel architecture
- real time
- ibm zenterprise
- hardware architecture
- single instruction multiple data
- level parallelism
- hardware implementation
- computer architecture
- multi core processors
- processing elements
- single chip
- floating point unit
- low cost
- multithreading
- software implementation
- high end
- hardware design
- memory management
- general purpose
- dynamic reconfiguration
- multi processor
- processor core
- manufacturing systems
- software systems
- high speed
- vlsi implementation
- processing units
- floating point
- resource manager
- embedded systems
- fpga device
- xilinx virtex
- associative memory
- parallel processing
- software architecture
- general purpose processors
- instruction set architecture