Pin-limited Frequency Downscaler AHB Bridge for ASIC to FPGA Communication.
Tommaso CecchiniFrancesco SechiLuca BacciarelliLuca MostardiniFrancesco BattiniLuca FanucciMarco De MarinisPublished in: DSD (2008)
Keyphrases
- hardware implementation
- hardware architecture
- single chip
- xilinx virtex
- communication bandwidth
- field programmable gate array
- design methodology
- real time image processing
- data acquisition
- low cost
- low power
- fpga implementation
- communication overhead
- signal processing
- physical design
- high speed
- image processing
- parallel processing
- general purpose
- low power consumption
- software implementation
- high frequency
- communication channels
- real time
- communication systems
- efficient implementation