An efficient VLSI processor chip for variable block size integer motion estimation in H.264/AVC.
Gustavo A. RuizJuan A. MichellPublished in: Signal Process. Image Commun. (2011)
Keyphrases
- variable block size
- motion estimation
- single chip
- high speed
- chip design
- motion estimator
- multiple reference frames
- inter frame
- video coding
- variable block size motion estimation
- coding efficiency
- low power
- block size
- motion vectors
- quadtree
- motion compensation
- motion compensated
- low complexity
- motion field
- image sequences
- video sequences
- video compression
- reference frame
- spatial domain
- motion model
- video coding standard
- block matching
- optical flow
- phase correlation
- differential pulse code modulation
- variable length
- macroblock
- computational complexity
- data structure
- computer vision
- estimation algorithm