Hardware architecture design of an H.264/AVC video codec.
Tung-Chien ChenChung-Jr LianLiang-Gee ChenPublished in: ASP-DAC (2006)
Keyphrases
- video codec
- hardware architecture
- inter frame
- video coding
- rate distortion
- mpeg avc
- video coding standard
- neural network
- transform domain
- image processing
- hardware architectures
- intra frame
- low bit rate
- bit rate
- computational complexity
- image sequences
- video compression
- compressed domain
- video quality
- motion compensation
- low complexity
- multiresolution
- video encoder