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A Pipelined Architecture to Map ATM Cells to 622 Mb/s SONET OC-12 Payloads.

Srini W. SeetharamGary J. MindenJoseph B. Evans
Published in: ISCAS (1994)
Keyphrases
  • pipelined architecture
  • maximum a posteriori
  • times faster
  • hardware implementation
  • real time
  • open source
  • field programmable gate array
  • atm networks
  • case study
  • image segmentation
  • mobile robot
  • signal processing