A 2.4-GHz reference doubled fractional-N PLL with dual phase detector in 0.13-μm CMOS.

Woojae Lee SeongHwan Cho

Published in: ISCAS (2010)

Keyphrases

high speed
power consumption
low cost
low power
detection algorithm
circuit design
phase information
real time
training phase
primal dual
image sensor
vlsi circuits