Abstract reduction in directed model checking CCS processes.
Antonella SantoneGigliola VagliniPublished in: Acta Informatica (2012)
Keyphrases
- model checking
- temporal logic
- transition systems
- formal verification
- model checker
- temporal properties
- formal specification
- automated verification
- bounded model checking
- finite state machines
- finite state
- partial order reduction
- symbolic model checking
- reachability analysis
- verification method
- timed automata
- pspace complete
- formal methods
- epistemic logic
- abstract interpretation
- computation tree logic
- process algebra
- asynchronous circuits
- concurrent systems
- linear temporal logic
- planning domains
- deterministic finite automaton
- artificial intelligence
- alternating time temporal logic
- process model