Investigation of Noise-Margin-Enhanced and Low-Power Memory Techniques for SoC Applications.
Cihun-Siyong Alex GongPublished in: Circuits Syst. Signal Process. (2015)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- single chip
- high power
- power dissipation
- energy dissipation
- logic circuits
- digital signal processing
- vlsi architecture
- noise level
- wireless transmission
- signal to noise ratio
- main memory
- low power consumption
- real time
- cmos technology
- signal processor
- gate array
- delay insensitive
- mixed signal
- image sensor
- noisy environments
- noise model
- general purpose