A low power multimedia processor implementing dynamic voltage and frequency scaling technique.
Tadayoshi EnomotoNobuaki KobayashiPublished in: ASP-DAC (2013)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- multimedia
- low cost
- gate array
- energy dissipation
- wireless transmission
- vlsi circuits
- cmos technology
- transmission line
- logic circuits
- vlsi architecture
- high power
- low power consumption
- clock frequency
- mixed signal
- efficient implementation
- image sensor
- delay insensitive
- power reduction
- low voltage
- power management
- power dissipation
- digital signal processing