Design of Sequential Elements for Low Power Clocking System.
Peiyi ZhaoJason McNeelyWeidong KuangNan WangZhongfeng WangPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2011)
Keyphrases
- low power
- single chip
- low cost
- power consumption
- high speed
- low power consumption
- power dissipation
- logic circuits
- vlsi architecture
- digital signal processing
- cmos technology
- mixed signal
- gate array
- circuit design
- vlsi circuits
- power reduction
- application specific
- video sequences
- computer simulation
- wireless transmission