Acceleration of Evolutionary Grammar Using an MISD Architecture Based on FPGA and Petalinuxs.
Bernardo Vallejo ManceroMireya ZapataPublished in: AHFE (13) (2020)
Keyphrases
- hardware architecture
- hardware implementation
- hardware design
- hardware architectures
- dedicated hardware
- real time
- fpga implementation
- software implementation
- fpga technology
- field programmable gate array
- high speed
- real time image processing
- pipelined architecture
- reconfigurable hardware
- parallel architecture
- low cost
- natural language
- management system
- xilinx virtex
- genetic algorithm
- data flow
- evolutionary optimization
- software architecture
- evolutionary computation
- data acquisition
- evolutionary algorithm
- neural network