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A Reconfigurable 8-to-10-bit 20-to-5-GS/s time-interleaved time-domain ADC.
Jiangbo Wei
Chenghao Zhang
Xinyu Wang
Yuan Chang
Maliang Liu
Published in:
Microelectron. J. (2023)
Keyphrases
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analog to digital converter
frequency domain
low cost
reconfigurable architecture
general purpose
hardware implementation
digital signal
fine grain
bit parallel
database
real time
neural network
magnetic tape
systolic array
multi objective evolutionary