A 53-61GHz Low-Power PLL With Harmonic Positive Feedback VCO in 65nm CMOS.
Razieh AbediRouzbeh KananizadehAmir EsmailiOmeed MomeniPayam HeydariPublished in: ISCAS (2018)
Keyphrases
- positive feedback
- low power
- cmos technology
- high speed
- power consumption
- nm technology
- low cost
- low voltage
- silicon on insulator
- power dissipation
- single chip
- image sensor
- wireless transmission
- negative feedback
- vlsi circuits
- mixed signal
- digital signal processing
- power reduction
- metal oxide semiconductor
- low power consumption
- vlsi architecture
- gate array
- power saving
- content analysis
- computer simulation
- real time