A low-power frontend system for fetal ECG monitoring applications.
Shuang SongMichael Johannes RooijakkersPieter HarpeChiara RabottiMassimo MischiArthur H. M. van RoermundEugenio CantatorePublished in: IWASI (2015)
Keyphrases
- low power
- monitoring system
- power consumption
- high speed
- low cost
- heart rate
- ultra low power
- single chip
- real time
- high power
- logic circuits
- vlsi architecture
- digital signal processing
- wireless transmission
- ultrasound images
- cmos technology
- back end
- low power consumption
- vlsi circuits
- gate array
- power dissipation
- image sensor
- power reduction
- power saving
- mixed signal
- delay insensitive