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An all-digital PLL for frequency multiplication by 4 to 1022 with seven-cycle lock time.
Takamoto Watanabe
Shigenori Yamauchi
Published in:
IEEE J. Solid State Circuits (2003)
Keyphrases
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real time
image processing
multimedia
digital media
database
databases
hidden markov models
low frequency
floating point
digital technologies
matrix multiplication
digital topology