Accelerating HMMer on FPGAs using systolic array based architecture.

Yanteng Sun Peng Li Guochang Gu Yuan Wen Yuan Liu Dong Liu

Published in: IPDPS (2009)

Keyphrases

systolic array
parallel architecture
reconfigurable architecture
data flow
hardware implementation
hardware software
architectural design
computer vision
scheduling problem
management system
parallel processing
database
pattern recognition
hardware design
web services
fpga implementation
data sets