CMOS design and analysis of low-voltage signaling methodology for energy efficient on-chip interconnects.
José C. GarcíaJuan A. Montiel-NelsonSaeid NooshabadiPublished in: Microelectron. J. (2009)
Keyphrases
- cmos technology
- low voltage
- energy efficient
- low power
- power dissipation
- design considerations
- high speed
- power consumption
- circuit design
- mixed signal
- low cost
- random access memory
- single chip
- wireless sensor networks
- energy consumption
- parallel processing
- cmos image sensor
- analog vlsi
- energy efficiency
- sensor networks
- energy saving
- routing protocol
- chip design
- real time