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Efficient techniques based on gate triggering for designing static CMOS ICs with very low glitch power dissipation.
Nihar R. Mahapatra
Sriram V. Garimella
Alwin Takeen
Published in:
ISCAS (2000)
Keyphrases
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cmos technology
power dissipation
power consumption
low power
nm technology
low cost
image segmentation
pattern recognition
vlsi circuits
high speed
parallel processing
information flow
data flow
image sensor
digital signal processing
low voltage