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A 50-Gb/s differential transimpedance amplifier in 65nm CMOS technology.
Sang Gyun Kim
Seung-Hwan Jung
Yun Seong Eo
Seung-Hoon Kim
Xiao Ying
Hanbyul Choi
Chaerin Hong
Kyungmin Lee
Sung Min Park
Published in:
A-SSCC (2014)
Keyphrases
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cmos technology
low power
high speed
flip flops
image sensor
spl times
dynamic range
power consumption
parallel processing
low voltage
power dissipation
mixed signal
silicon on insulator
low cost
hardware and software