NeuSB: A Scalable Interconnect Architecture for Spiking Neuromorphic Hardware.
Adarsha BalajiPhu Khanh HuynhFrancky CatthoorNikil D. DuttJeffrey L. KrichmarAnup DasPublished in: IEEE Trans. Emerg. Top. Comput. (2023)
Keyphrases
- hardware architecture
- real time
- hardware implementation
- vlsi implementation
- low cost
- vlsi architecture
- software implementation
- hardware design
- content addressable
- hardware and software
- management system
- scalable distributed
- bio inspired
- pipeline architecture
- parallel architecture
- dedicated hardware
- high speed
- instruction set
- processing units
- hardware software
- hardware architectures
- communication protocol
- event driven
- multithreading
- hebbian learning
- computer systems
- fpga technology