High-Speed Hardware Implementation of the Knapsack Cipher.
Paul S. HenryR. D. NashPublished in: CRYPTO (1981)
Keyphrases
- hardware implementation
- high speed
- knapsack problem
- signal processing
- efficient implementation
- hardware design
- real time
- low power
- hardware architecture
- dedicated hardware
- software implementation
- dynamic programming
- upper bound
- image processing algorithms
- shift register
- fpga implementation
- field programmable gate array
- pattern recognition
- neural network
- fpga technology
- pipeline architecture
- pipelined architecture
- fpga device
- processing elements
- packing problem
- low cost