Accurate power estimation of CMOS sequential circuits.

Tan-Li Chou Kaushik Roy

Published in: IEEE Trans. Very Large Scale Integr. Syst. (1996)

Keyphrases

power consumption
power dissipation
chip design
analog vlsi
high speed
circuit design
delay insensitive
accurate estimation
vlsi circuits
low power
power reduction
cmos technology
high quality
estimation accuracy
floating gate
focal plane
estimation algorithm
computationally efficient
real time
high accuracy
data sets