A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation.
Jorge Soto LeonCarlos Silva CárdenasErnesto Cristopher Villegas CastilloPublished in: ICECS (2016)
Keyphrases
- fpga implementation
- highly parallel
- motion estimation
- hardware implementation
- efficient implementation
- real time
- field programmable gate array
- parallel architectures
- computing systems
- single chip
- optical flow
- general purpose
- image sequences
- motion vectors
- parallel programming
- image processing algorithms
- signal processing
- single pass
- video sequences
- hardware design
- parallel algorithm
- video coding
- information systems